R&D Engineer Advanced Photomasks (H/F/X)

What you will do As the power of EUV light sources continues to increase in future ASML lithography systems, optimizing and maintaining photomask performance becomes an increasingly critical challenge. As an R&D Engineer, you will help develop the technologies and processes that optimize photomask imaging performance and ensure photomasks remain defect-free and production-ready throughout their operational lifetime. You will work on some of the most challenging aspects of advanced lithography, including mask architecture, cleaning, contamination control, handling-induced degradation, and mask lifetime management. By linking mask condition to wafer printing performance, you will bridge the gap between process engineering, materials science, and lithography system performance. Your research will contribute directly to imec’s advanced patterning program and support the development of future semiconductor manufacturing technologies. Through experimental work, process development, and data-driven optimization, you will help ensure that photomasks continue to meet the demanding requirements of next-generation EUV and High-NA EUV lithography. Your responsibilities Collaborate with multidisciplinary teams to translate insights into practical solutions that improve mask performance, scanner productivity, and patterning capability. Analyze wafer lithography and mask performance data to understand the impact of mask architecture, aging, contamination, handling, storage, exposure, and maintenance on printing performance. Develop, qualify, and optimize mask cleaning processes to ensure consistent mask quality and lifetime. Apply a strong analytical approach, supported by experimental investigations and literature review, to identify and understand the physical and chemical mechanisms driving mask performance and degradation. Develop and evaluate mitigation strategies that minimize mask degradation and maximize mask lifetime for current EUV lithography systems, while anticipating the challenges associated with future generations of higher-power EUV and High-NA lithography scanners. Contribute to the development of next-generation mask maintenance and contamination-control concepts that enable the continued scaling of semiconductor manufacturing technologies. Training and Development You will begin your journey with an intensive onboarding and training program at imec in Leuven, gaining hands-on experience with state-of-the-art lithography equipment, EUV photomask technology, and advanced semiconductor manufacturing processes. During this period, you will: Build a solid understanding of EUV photomask technology, including mask architecture, performance, degradation mechanisms, contamination control, and mask lifetime management. Develop in-depth knowledge of advanced lithography systems, their operating principles, and the expected evolution toward higher-power EUV and High-NA EUV platforms. Learn to operate and interpret data from imec’s advanc